Yes, with the PiDP-10 we did a huge injection mold and it nearly killed us. Well, no, but we still have not recovered the investment. And it became an expensive thing, which limits the amount of people who want to play with one.
So with the PiDP-1, we figured out how to make the entire case from FR4 panels. As there are no Iconic Curves in a PDP-1 case. Turns out this is the sturdiest PiDP yet!
We hope to get some interest from the democoder community. Writing games and demos for the PDP-1's Type 30 display is so much more fun than pushing pixels on a C64 :-)
Someone had a PiDP-10 set up at the last Hacker's Conference. Damn it's a gorgeous machine. Your heroic efforts to recreate it in such spectacular fidelity are greatly appreciated by many!
Can't wait to see the PiDP-1! By the way, something I'm really looking forward to is the KA-10 FPGA implementation for the PiDP-10, rather than the less realistic SIMH simulator running on top of Linux/Raspberry Pi. It would be a true miniaturized PDP-10 CPU, not just a simulation. Do you know if this is still being worked on?
I have a bunch of KA10 verilog that worked on a DE10-nano in the past, but it's been quite a while and i think i have a bunch of uncommitted stuff lying around as well. The verilog is based on the original schematics and I successfully ran LISP and Spacewar on it. Unfortunately simulating peripherals is always a pain, so the project currently lies dormant. But i'd like to pick it up again at some point. I just really need to rethink my approach how to do this, qsys was maybe not the greatest way to wire up the system.
It’s exciting to hear that you’ve successfully run LISP and Spacewar on it, especially since the Verilog is based on the original schematics. That makes the PiDP-10 an actual KA-10 CPU, which is a big deal for authenticity.
I completely understand the difficulty with simulating peripherals. Perhaps the FPGA could focus on implementing the CPU, leaving the peripherals to a SIMH backend using a hybrid approach. A slightly longer PCB with space for both a DE10-nano and an RPi 0 might work out well.
Have you considered opening a discussion on VCFED or Google Groups to gather more ideas and see what others think? I’m sure many people would be excited to follow and contribute to that progress.
I hadn't connected it to the pidp-10 panel yet actually, my stuff is older than that. but eventually i would like to. the approach i went with was to put some of the peripherals on the linux side of things but have the controller logic on the FPGA. it's all a bit fiddly with FPGAs...
