I have heard of this structure also referred to as a PLA - programmable logic array, and I think a ULA is specifically for a PLA that is embedded in the empty space of a bigger design (so that in case something is broken, a debug is one mask, not a full respin).
I am not sure that Wikipedia is out-of-date enough to have the precise terminology, but I also may be wrong.
The terminology is a bit of a mess, but usually a PLA is highly structured with an AND plane and an OR plane, so it implements sum-of-products logic. A gate array is more general, with arbitrary connections.
I am not sure that Wikipedia is out-of-date enough to have the precise terminology, but I also may be wrong.