Rockwell 6502s have bbr/bbs (branch on bit set/reset in a zp address) - I think for use with io ports mapped into zero page (they’re not terribly useful otherwise).
That is exactly how it is meant to be used. Nice little tidbit: the 6809 allowed you to move the 'zero page' anywhere you wanted (of course not really a zero page when you move it to another page than zero, but you get the idea).
Yes, I have a prototype chip of the 65816 somewhere in a moving box, I really had high hopes that that would be the future and then 68K happened and I was sold on Motorola, and a while later had to adapt to x86 which I've always found ugly and non-orthogonal.
The 816 starts to look fine on paper at first but it's a pain in the ass to program and interface. 24-bit address bus but no registers wide enough to hold an address, and paged memory. Instead of adding new 16-bit registers, they just widened the existing ones and added mode switch flags. Extra 8 physical address lines are multiplexed with the data bus, so external bus logic required to do anything with them.
It's just kind of an awkward hack. It's fast though.
I had the 65816 in much higher regard before I tried to program for it. It's every bit as fun to program for as the 8086. I don't think it would have sold well were it not for Apple and their IIgs.
Same. I liked it on paper until I wrote code for it. Then I grew to hate it.
Wish WDC had made a "true" 16 or 32-bit 65xx. Forget the mode switching and extend the opcode set (by adding some two-byte instructions via a prefix-byte or something) to add additional 16 and 24-bit register access modes so one could get full linear 24-bit addressing. And let the direct page and stack sit anywhere in the 24-bit address space rather than just in the lowest page.
In the end I think the 65816 is mostly just a 6502 with some extra stuff bolted on the front of the instruction decoder. Quick and dirty, not much of a step up from the various 6502 + external bank switching we saw in the 80s.
