> We achieve this with the union of a field-programmable analog array (FPAA), an ARM processor and state-of-the-art firmware. An FPAA is similar in concept to a field-programmable gate array, but instead of logic elements, it is composed of analog elements: opamps, comparators, capacitors and switches. These fundamental elements are used to build higher level modules like filters, oscillators and gain stages.
Is it going to inspire a wave of FPAA hobbyist devboardvs and activities (just like microcontroller and later FPGA)? If so, we are surely living in a great time of computing.
FPGAs are still pretty hard to get into, for the average hobbyist. Yes, you can "get started" quite easily nowadays, but it's not that easy to go beyond what a decent MCU can do.
That may be the main selling point of ZRNA. It's easier to use their FPAA API than to cobble together FPGA/DSP stuff. May also be easier to change on the fly, for example to automate certain experiments.
The specs on the op amps aren't particularly impressive. The unity gain is 18Mhz which wouldn't be able to even keep up with a modern AVR clock(16-20Mhz). You can find discrete parts with similar specs for sub-$1.
It's a neat idea and all but when it comes to the analog design space there is a lot more variables to consider and constraints that drive them.
Your average FPGA on the other hand is able to synthesize multiple 8-bit micros and benefits from wide parallelization, I don't see similar benefits with this approach.
Sure, but analog processing happens continuously and at an SNR that is equivalent to a very high bit depth. If you had an analog processing chain with 18MHz of BW (which granted you'd need somewhat more GBP), that would be more akin to a digital system that can produce output samples at 40Msps+. If each output sample needed even just a few dozen processing clocks to compute, you're already looking at a 500MHz+ clock. Although you could build that digital solution, it wouldn't surprise me if the analog solution was significantly lower power.
> analog processing happens continuously and at an SNR that is equivalent to a very high bit depth
16 bits is roughly 100dB, and achieving more than that is usually a serious engineering challenge. I'd like to see crosstalk rejection numbers for this system.
There are people working in the other direction, trying to use analogue for implementing the calculations of neural nets, and they tend to target the equivalent of 8 bit depth.
Yes, but I don't think your refuted my point. 16 bits (96dB SNR) is pretty good for an 18MHz signal processing system. Comparing it to a 18MHz 8bit AVR with a 10bit, 15ksps ADC is probably missing what makes this potentially cool.
Don't get me wrong, I think this is a pretty niche thing that doesn't have a lot of applications. DSP is great, and it's not going to get overthrown anytime soon. But if you were looking for things that make signal processing in the analog domain exciting to think about, I stand by high equivalent bit depth for the processing bandwidth and power consumed as a valid advantage.
> The unity gain is 18Mhz which wouldn't be able to even keep up with a modern AVR clock(16-20Mhz).
Analog constraints are much different than digital ones. If you're expecting to do anything on the 18MHz range you wouldn't be looking at this product.
But in practice I'd doubt you would be using it for anything > 100kHz, maybe 1MHz. Which is absolutely fine for most applications this is intended.
If you're really targeting anything analog > 1MHz you really should know what you're getting into, and you wouldn't be looking at a board like this.
The concept of a field-programmable-ANALOG-array (FPAA) bubbles up to the surface every once in a while. I think it's a neat idea with some interesting use-cases.
Motorola had an FPAA product back in the 90's, but it never gained market traction and was aimed primarily at education.
I wonder now that FPGA's have gotten so powerful and large if it isn't possible to just simulate specific analog parts and "wire" them together into "analog circuits" to rapidly prototype analog designs? This would be different from simulation on a computer because the simulated analog FPGA circuit could actually be used, evaluated and tweaked in the field. Then, when the design is mature one could realize it using actual analog components.
I know slightly more than nothing about analog/digital signal processing, so I get your point about the ZRNA probably not being the savior of the analog signal world...
That being said, you underestimate the "Blinkenlight crowd". There are not only hobbyists, but also researchers, who do not have years of EE education and experience, but want/need to cobble together hardware and software to do their research. Preferably without going back to school for a couple of years.
I can totally see where the ZRNA might save you some time. It's often not at all that easy to vary signal processing parameters across or within experiments.
When you look at an art form like "blinkenlights" and see exclusively meaningless junks and technobabble, don't see it as a failure. See it as an opportunity.
>The unity gain is 18Mhz which wouldn't be able to even keep up with a modern AVR clock(16-20Mhz).
I am not sure what this implies; would you be able to build an equivalent, digital circuit (with presumably a ADC and a DAC stage) with an average AVR then? Or what's the clock comparison for?
Okay, but I'm still confused as to why would you compare it to AVR frequency; was that just a random comparison ("this car goes so slow you could outrun it") or would the frequency of a MCU clock being higher than the bandwidth of an op amp ever be important?
I'm divided on this. It's hard for me to figure out what this hardware is actually good for, and particularly in which use cases it beats FPGAs. As far as I can see, FPGAs or DSP-cores in MCUs/processors seem to be the real competitor, and the question will be at what sampling rate a DSP solution will outperform whatever this ZRNA does.
And on top of that, the API looks quite understandable, so it may be easier to use the ZRNA for a certain signal processing task than create a custom DSP Core in Verilog or dig through MCU documentation. Though you could probably make an API for generating verilog code for the Icestorm toolchain, which would not require deep knowledge of digital design.
Other questions are bandwidth and sampling constraints. It seems to have at least one ADC...
It's undoubtedly aimed at musical audio generation and signal processing. A quick search will reveal the number of gotchas in implementing even a simple alias-free (bandlimited interpolation) digital sawtooth wave, never mind arbitrary wave tables. The rebirth of analog audio synths was partially driven by the complex behaviors of real analog circuitry - particularly when you account for saturation, hysteresis and other "imperfections" that don't occur naturally in a digital simulation.
It would potentially be good for audio applications. Analog oscillator and filter emulation is actually quite processor intensive and is never perfect, always has aliasing.
I bought some of the Anadigm FPAAs a while ago, I need to get round to using them, one thing to note though is they seem to use the discrete time style circuit, so they actually switch at a high frequency between different capacitors to generate a filter.
Is it going to inspire a wave of FPAA hobbyist devboardvs and activities (just like microcontroller and later FPGA)? If so, we are surely living in a great time of computing.